The development of dynamic random access memory (DRAM) arrays with higher density and smaller feature sizes has increased the rate of DRAM refresh operations to compensate for a larger number of leaking memory cells. The higher DRAM refresh rate can impact system performance. For example, DRAM refresh operations can impede performance because all open pages of a memory bank are generally closed before a bank may be refreshed. Moreover, DRAM bank access is generally not allowed during a refresh operation, thus further impeding system performance.